floating-point unit / 80-bit math coprocessor 16 MHz
High Performance 80-Bit Internal Architecture
Implements ANSI/IEEE Standard 754-1985 for Binary Floating-Point Arithmetic
Upward Object-Code Compatible from 8087
Fully Compatible with 387DX and 387SX Math Coprocessors. Implements all 387 Architectural Enhancements over 8087
Directly Interfaces with 80C186 CPU
80C186/80C187 Provide a Software/Binary Compatible Upgrade from 80186/82188/8087 Systems
Expands 80C186 s Data Types to Include 32-, 64-, 80-Bit Floating-Point, 32-, 64-Bit Integers and 18-Digit BCD Operands
Directly Extends 80C186 s Instruction Set to Trigonometric, Logarithmic, Exponential, and Arithmetic
Instructions for All Data Types
Full-Range Transcendental Operations
for SINE, COSINE, TANGENT, ARCTANGENT, and LOGARITHM
Built-In Exception Handling
Eight 80-Bit Numeric Registers, Usable as Individually Addressable General Registers or as a Register Stack
Available in 40-Pin CERDIP and 44-Pin
PLCC Package |
