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| • HIGH-DENSITY PROGRAMMABLE LOGIC & 8212 2000 PLD Gates & 8212 32 I/O Pins, Four Dedicated Inputs & 8212 96 Registers & 8212 High-Speed Global Interconnect & 8212 Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. & 8212 Small Logic Block Size for Random Logic • HIGH-PERFORMANCE E2 CMOS & 174 TECHNOLOGY & 8212 f max = 125 MHz Maximum Operating Frequency & 8212 t pd = 7.5 ns Propagation Delay & 8212 TTL Compatible Inputs and Outputs & 8212 Electrically Erasable and Reprogrammable & 8212 Non-Volatile & 8212 100% Tested at Time of Manufacture & 8212 Unused Product Term Shutdown Saves Power • ispLSI OFFERS THE FOLLOWING ADDED FEATURES & 8212 In-System Programmable& 8482 ISP& 8482 5-Volt Only & 8212 Increased Manufacturing Yields, Reduced Time-to- Market and Improved Product Quality & 8212 Reprogram Soldered Device for Faster Prototyping • OFFERS THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE GATE ARRAYS & 8212 Complete Programmable Device Can Combine Glue Logic and Structured Designs & 8212 Enhanced Pin Locking Capability & 8212 Three Dedicated Clock Input Pins & 8212 Synchronous and Asynchronous Clocks & 8212 Programmable Output Slew Rate Control to Minimize Switching Noise & 8212 Flexible Pin Placement & 8212 Optimized Global Routing Pool Provides Global Interconnectivity • pLSI/ispLSI DEVELOPMENT TOOLS pDS & 174 Software & 8212 Easy to Use PC Windows& 8482 Interface & 8212 Boolean Logic Compiler & 8212 Manual Partitioning & 8212 Automatic Place and Route & 8212 Static Timing Table ispDS & 8482 Software & 8212 Industry Standard, Third-Party Design Environments & 8212 Schematic Capture, State Machine, HDL & 8212 Automatic Partitioning and Place and Route & 8212 Comprehensive Logic and Timing Simulation & 8212 PC and Workstation Platforms | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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